8.7
References
Page numbers in brackets after a reference indicate its location in the chapter body.
Actel. 1996.
FPGA Data Book and Design Guide.
No catalog information. Available from Actel Corporation, 955 East Arques Avenue, Sunnyvale, CA 94086-4533, (408) 739-1010. Contains design guides and applications notes, including: Estimating Capacity and Performance for ACT 2 FPGA Designs (describes circuits to connect FPGAs to PALs); Binning Circuit of Actel FPGAs (describes circuits and data for performance measurement); Global
Clock Networks (describes clock distribution schemes); Fast On and Off Chip Delays with ACT 2 I/O Latches (describes techniques to improve
I/O performance); Board Level Considerations for Actel FPGAs (describes
ground bounce and
SSO problems); A
Power-On Reset (POR) Circuit for Actel Devices (describes problems caused by slowly rising supply voltage); Implementing Load (
sic
) Latency Fast Counters with ACT 2 FPGAs;
Oscillators for Actel FPGAs (describes crystal and RC oscillators); Designing a
DRAM Controller Using Language-Based Synthesis (a detailed Verilog description of a 4 MB DRAM controller including refresh). See also the Actel Web site. [
reference location
]
Altera. 1996.
Data Book.
No catalog information. Available from Altera Corporation, 2610 Orchard Parkway, San Jose, CA 95134-2020, (408) 944-0952. Contains information on the FLEX 10k and 8000 complex PLDs; MAX 9000, 7000, and 5000 complex PLDs; FLASHlogic; and EPLDs. A limited number of application notes are also included. More information may be found at the Altera Web site. [
reference location
]
Connor, D. 1992. “Taking the first steps.”
EDN,
April 9, p. 98. ISSN 0012-7515. The second part of this article, “Migrating to FPGAs: Any designer can do it,” was published in EDN, April 23, 1992, p. 120. See also
http://www.ednmag.com
. Both articles are reprinted in the 1994 Actel Data Book. A description of designing, simulating, and testing a voicemail system using Viewlogic software. [
reference location
]
Skahill, K. 1996.
VHDL for Programmable Logic.
Menlo Park, CA: Addison-Wesley, 593 p. ISBN 0-201-89573-0. TK7885.7.S55. Covers VHDL design for PLDs using Cypress Warp design system. [
reference location
]
Xilinx. 1996.
The Programmable Logic Data Book.
No catalog information. Available from Xilinx Corporation, 2100 Logic Drive, San Jose, CA 95124-3400, (408) 559-7778. Contains details of XC9500, XC7300, and XC7200 CPLDs; XC5200, XC4000, XC3000 LCA FPGAs; and XC6200 sea-of-gates FPGAs. Earlier editions of this data book (the 1994 edition, for example) contained a section titled “Best of XCELL” that contained extremely useful design information. Much of this design material is now only available online, at the Xilinx Web site. [
reference location
]
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