Agilent Technologies Accelerates Early Wireless Design Verification with New Release of SystemVue

Design Flow Connects EDA with Test and Measurement for Debugging Across Domains

SANTA CLARA, Calif. — (BUSINESS WIRE) — June 5, 2012 — Agilent Technologies Inc. (NYSE: A) today announced a new release of SystemVue, Agilent’s premier platform for designing communications systems.

Agilent will demonstrate SystemVue 2012.06 along with a range of solutions for everything from circuit-level modeling through system verification for general RF, microwave, 4G communications, and aerospace/defense applications at DAC2012 (Booth 313), June 3-7, in San Francisco. SystemVue 2012.06 will also be demonstrated at IMS 2012/IEEE MTT-S (Booth 1015), June 19-21, in Montréal, Canada. A range of premier partner solutions will be available on Agilent Avenue and throughout the event area.

SystemVue 2012.06 provides deeper design-flow integration of baseband signal-processing tools with intellectual property reference libraries, RF electronic design automation tools and test equipment. The software enables system architects to predict and cross-verify baseband and RF physical-layer performance at earlier phases of the design process, enabling faster deployment of 4G, WLAN and aerospace/defense systems.

SystemVue 2012.06 improves the design flow for new communications systems by creating an effective platform for cross-domain debugging. By bringing target-specific FPGA tools up to the physical layer of the system, HDL designers can validate against accurate RF models and live test and measurement results, for cross-domain modeling.

New SystemVue 2012.06 enhancements for baseband modelers include:

  • A native math language (.m) debugger that enables line-by-line execution with breakpoints and assertions across multiple model objects, while preserving the underlying MATLAB .m format.
  • C++ modeling with Microsoft Visual C++ 2010, the world’s leading software IDE. ( W1718 C++ Code Generator supports interactive cross-platform debugging, code generation and system-level verification.)
  • VHDL/Verilog verification that adds Aldec Riviera PRO HDL cosimulation.
  • Direct FPGA flow support for Altera Stratix and Cyclone parts, through integration of Altera Quartus with SystemVue’s W1717 Hardware Design Kit. (SystemVue now supports vendor-neutral HDL code-generation that integrates directly with both Xilinx and Altera tools.)

“Agilent is committed to accelerating existing development flows for intellectual property,” said Frank Ditore, SystemVue product manager at Agilent. “We are bridging the design/test gap for communications ASIC/SoC, DSP and FPGA design through integration of enterprise modeling interfaces and languages with accurate RF modeling and real measurement results. This allows our customers to verify difficult baseband PHYs as early as possible.”

Other Enhancements

SystemVue 2012.06 also features updates to several libraries and design personalities as maintenance upgrades. The impacted solutions include:

U.S. Pricing and Availability

Agilent’s SystemVue 2012.06 is available for download at Pricing for the SystemVue environment starts at approximately $17,340. A free, 30-day evaluation copy is available at

More information on SystemVue 2012.06 is available at For a video demonstration, go to An image of SystemVue 2012.06 with its new modules is available at Visit the Agilent YouTube network at to see latest products and applications videos in electronic design and measurement.

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