Highly Accurate Lithography Verification Solution Offers Lowest Cost of OwnershipMOUNTAIN VIEW, Calif., June 27, 2012 — (PRNewswire) — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems and Systems on Silicon Manufacturing Company (SSMC), a Singapore-based joint venture of NXP Semiconductors and Taiwan Semiconductor Manufacturing Company Ltd., today announced their adoption of Synopsys' Proteus LRC. SSMC has deployed Proteus LRC in their production and development flows for post-OPC lithography verification to identify critical manufacturing hotspot locations that are sensitive to process variation and susceptible to increased yield loss. The hotspots identified by Proteus LRC are fixed prior to committing a design to manufacturing, thereby improving yield ramp, reducing overall development time and resulting in a more reliable process for bringing new products to market.
"This tool enables our design support service team to effectively support our customers during their product development and design validation flow. With Proteus LRC integrated in our chip finishing flow, SSMC is able to consistently and reliably identify manufacturing hotspots early in the prototype tape out phase, when corrective action is most feasible," said Dhruva Kant Shukla, director for product & test engineering at SSMC. "With deploying Proteus LRC, we are better equipped to deliver our innovative processes in a more robust and reliable way as we progress to smaller technology nodes for specialty wafers required for high performance mixed signal applications."
Proteus LRC delivers industry-leading check algorithms and models to accurately predict the manufacturing process and identify areas in a layout that are not meeting the design intent or are very sensitive to process variation. For easy deployment, Proteus LRC uses the same industry-proven Proteus compact models and Synopsys® Sentaurus Lithography rigorous models used for optical proximity correction (OPC) and process development. For example, resist top loss and footing are more prevalent at leading-edge nodes and can result in issues during the etch process and ultimately yield loss. Proteus LRC efficiently identifies these areas where resist top loss or footing will occur by using the 3D predictability of these models to provide unique insight into the feature profiles.
Proteus LRC is built on the Proteus engine and integrated into Synopsys' Proteus Pipeline Technology, enabling a single-flow solution from design tapeout to mask fracture. The Pipeline delivers concurrent processing at all stages of the mask synthesis and fracture flow to minimize I/O time for efficient handling of large terabyte datasets encountered at leading-edge technology nodes. The Proteus engine provides an industry-proven platform that is highly scalable to hundreds, even thousands, of CPUs. This enables control of turnaround time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.
"Proteus LRC consistently delivers industry-leading accuracy that enables companies like SSMC to commit their designs to production with the confidence of knowing they are free of critical manufacturing hotspots," said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys. "This accuracy and the low cost of ownership have made Proteus LRC the lithography verification solution of choice at leading semiconductor manufacturers worldwide."
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
SSMC Systems on Silicon Manufacturing Company Pte Ltd. (SSMC) is an 8-inch wafer fabrication facility, a joint venture between NXP Semiconductors and Taiwan Semiconductor Manufacturing Company. Since its operations in 2000, SSMC has grown rapidly to become one of the top semiconductor foundries in the world in terms of operational measures. Today, SSMC is offering flexible and cost effective semiconductor fabrication solutions through the utilization of Advanced CMOS, Embedded flash, Analog and Mixed Signal, RF and BCD processes technologies, ranging from 0.25-micron to 0.11-micron technology. For more information, visit www.ssmc.com.
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SOURCE Synopsys; SSMC