Sidense exhibiting and speaking at the TSMC OIP Forum
San Jose Convention Center
150 West San Carlos Street
San Jose, CA 95110
Tuesday, October 1
8:00AM to 6:00PM
Sidense's R&D Director to present at 4:30:
An Antifuse-based Non-Volatile Memory for Advanced Process Nodes and FinFET Technologies
Non-volatile memory (NVM) is a vital component for most ICs used across the electronics industry including those used in mobile, computing, and automotive applications along with the growing range of devices that will comprise the evolving "Internet of Things" (IoT). Antifuse-based one-time-programmable (OTP) memory, in particular, meets many NVM requirements as a replacement for ROM and eFuses, providing code and key storage and for trimming and device configuration.
This presentation will discuss Sidense 1T-OTP technology, its applications and how it fits the requirements for devices manufactured in advanced process nodes. Sidense will also present their 1T-OTP roadmap moving beyond 20nm into FinFET processes.
For more information or to schedule a meeting with Sidense, please contact:
Sidense Corp. provides very dense, highly reliable and secure non-volatile one-time programmable (OTP) Logic Non-Volatile Memory (LNVM) IP for use in standard-logic CMOS processes. The Company, with over 115 patents granted or pending, licenses OTP memory IP based on its innovative one-transistor 1T-Fuse bit cell, which does not require extra masks or process steps to manufacture. Sidense 1T-OTP macros provide a better field-programmable, reliable and cost-effective solution than flash, mask ROM, eFuse and other embedded and off-chip NVM technologies for many code storage, encryption key, analog trimming and device configuration uses.
Over 100 companies, including many of the top fabless semiconductor manufacturers and IDMs, have adopted Sidense 1T-OTP as their NVM solution for more than 300 designs. Customers are realizing outstanding savings in solution cost and power consumption along with better security and reliability for applications ranging from mobile and consumer devices to high-temperature, high-reliability automotive and industrial electronics. The IP is offered at and supported by all top-tier semiconductor foundries and selected IDMs. Sidense is headquartered in Ottawa, Canada with sales offices worldwide. For more information, please visit www.sidense.com.
About the OIP Forum
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC's design ecosystem member companies together to share with our customers real-case solutions for customers' design challenges and success stories of best practice in TSMC's design ecosystem.
This year, the forum will feature a day-long conference starting with executive keynotes from TSMC in the morning plenary session to outline future design challenges and roadmaps, as well as discuss a recent collaboration announcement, 30 selected technical papers from TSMC's EDA, IP, Design Center Alliance and Value Chain Aggregator member companies, and an Ecosystem Pavilion featuring up to 80 member companies showcasing their products and services.
For more information or to schedule a meeting with Sidense, please contact: Jim Lipman Sidense Email Contact 925-606-1370