"IDT produces industry-leading products across a wide range of nodes and applications, and we were pleased to see the Voltus technology delivers up to a 10X performance improvement across various test cases ranging from 180nm to 28nm designs," said Alan Coady, senior director of the Design Automation Group at IDT. "With the accuracy, ease of use, stability and support we received, we are considering widespread deployment of this new technology from Cadence."
IDT dramatically reduced run time on one major design project from more than 59 hours to five hours, with no loss of signoff accuracy. The enabling technologies behind the Voltus solution include a new massively distributed parallel power-integrity engine and a hierarchical analysis technology that can run designs with up to 1 billion instances. The Voltus solution also features innovative technologies in physically aware power-grid optimization within the Cadence Encounter® Digital Implementation System and an integrated electrical signoff flow with Cadence's Tempus Timing Signoff Solution. The Tempus and Voltus products together form the industry's first unified signoff solution, providing a fast solution for converged timing and power signoff.
More information on Voltus IC Power Integrity Solution is available at www.cadence.com/news/Voltus.
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