Tokyo Electron Device Announces Release of TB-7VX-690T/-980T/-1140T-PCIEXP Development Test Platforms with Virtex-7 FPGA, Supporting Large-Scale PCI Express Gen3

– Provides ultrahigh-speed evaluations platforms for connectivity systems and high-bandwidth wired applications –

YOKOHAMA, Japan — (BUSINESS WIRE) — November 19, 2013 — Tokyo Electron Device Limited (TED) has announced the launch of the new Virtex-7 FPGA evaluation platform; TB-7VX-690T/-980T/-1140T-PCIEXP (TB-7VX-xxxT-PCIEXP, hereinafter) which supports large-scale PCI Express Gen3.

The TB-7VX-xxxT-PCIEXP series, sold under the TED original products brand name “inrevium,” is a test platform suitable for next-generation high-performance wired communication applications, prototyping of large-scale SoCs, and high-speed data processing applications such as high-performance computing. There are now three models available now that accommodate three different FPGA logic sizes.

The TB-7VX-xxxT-PCIEXP series comes with a Virtex-7 XT FPGA device, which offers the industry’s best processing performance with the lowest power consumption, as well as a high-speed transceiver, DSP and BRAM. The series also offers an ultra-high bandwidth and high-speed data transfer with x8-lane PCI Express Gen3 (using FPGA integrated hardware block for PCI Express) and high-speed memory interface with two channels of 1,600 Mbps DDR3 SDRAM SO-DIMM.

The physical length of a signal line is becomes shorter as the data communication speed increases. Connecting the optional optical fiber solution TB-FMCH-OPT10 FMC card with optical cable interface to TB-7VX-xxxT-PCIEXP enables 10ch of 10G optical modules to be mounted on each FPGA mezzanine card (FMC) connector. This achieves an optical interface configuration of up to 400Gbps.

The TB-7VX-xxxT-PCIEXP can also be configured with TED’s FMC cards and the user’s custom interfaces. It allows combinations with various interfaces and interface upgrades in the future quickly and easily.

In addition, for reference designs, high-speed DDR3 SDRAM SO-DIMM interface design and PCI Express DMA design come with TB-7VX-xxxT-PCIEXP. These reference designs enable fast evaluation and development for various memory interfaces that need to accommodate significantly increased image and data communication and higher data transfer speeds.

TED is a premium member of the Xilinx Alliance Program and is certified by Xilinx as having top-of-the-line technologies. TED has passed on-site audits that included 320 Xilinx screenings, such as business processes, technologies, product qualities and support abilities. TED provides system level solutions for each customer requirement based on the solid technologies TED has acquired through its long time experience of development. The TB-7VX-xxxT-PCIEXP accommodates minimum-, semi- and full-customized boards, and supports the improvements in flexibility for designing, development, high-volume production and rapid launching of products with high added-value.

�nbsp; TB-7VX-xxxT-PCIEXP series features
• Compatible with the Virtex-7 XT FPGA device, which supports PCI Express Gen3 and standard adoption of the DDR3 SDRAM SO-DIMM 2 system, enabling high-capacity and high-speed data communication.
• 4x FMC HPC connectors offer superior versatility

�nbsp; TB-7VX-xxxT-PCIEXP series product photo

�nbsp; TB-7VX-xxxT-PCIEXP series specifications

● FPGA: Xilinx

XC7VX690T-2FFG1926 / XC7VX980T-2FFG1926 / XC7VX1140T-2FLG1926

● Configurations:

• Configuration using micro SD

• High-speed configuration using on-board BPI flash

● Rocket I/O GTH transceiver:

• PCI Express x8 (Gen3)

• FMC HPC connector x4 (GTH 10CH is connected to each FMC, and only LA is assigned for user input/output)

● Memory: DDR3 SDRAM SO-DIMM connector x2 (with 4Gbit SO-DIMM module)

● Interface:

• MMCX clock input/output

• SPI flash (128Mbit)

• USB3.0

• PMOD (Digilent)

● Push switch x4

● LED x12

● DIP switch x12

● 16-pin GPIO pin header

● Power supply

● Reference designs

High-speed DDR3 SDRAM SO-DIMM interface (Verilog HDL)

PCI Express DMA design (Verilog HDL)

● Substrate size: H140 × W312 (mm)

�nbsp; TB-7VX-xxxT-PCIEXP series block diagram

�nbsp; TB-FMCH-OPT10 features
● Optical cable data communication using Xilinx FPGA high-speed serial transceivers
● Equipped with reference clock for Xilinx high-speed serial transceivers (156.5MHz OSC & MMCX input)

�nbsp; TB-FMCH-OPT10 product photo

�nbsp; TB-FMCH-OPT10 specifications
● QSFP module gauge x2

1 | 2  Next Page »

Review Article Be the first to review this article
Harris: ENVI OneButton


Featured Video
Currently No Featured Jobs
Upcoming Events
Commercial UAV Expo 2016 at MGM Grand Hotel Conference Center Las Vegas NV - Oct 31 - 2, 2016
GIS-Pro 2016: URISA's 54th Annual Conference at Toronto Canada - Oct 31 - 3, 2016
24th ACM SIGSPATIAL International Conference at San Francisco Bay Area, California, USA San Francisco - Oct 31 - 3, 2016
Teledyne Optech
University of Denver GIS Masters Degree Online
Teledyne: - Countless CAD add-ons, plug-ins and more.

Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy