eSilicon’s Patrick Soheili to present on Design for Yield at the IEEE Electronic Design Process Symposium in Monterey

April 8, 2014, San Jose, Calif.

What: Leveraging the Full Value of Optimized IP—Design for Yield

Where: IEEE Electronic Design Process Symposium (EDPS) 2014, Monterey Beach Hotel, Monterey, California

When: April 17-18, 2014, 9:45 AM

Who: Patrick Soheili, VP, business development and VP and GM, IP Solutions, eSilicon

Abstract: Leveraging the Full Value Of Optimized IP — Design for Yield

Choosing the correct IP, integrating it efficiently and predictably and verifying the application are all important. At the end of the day, there is one parameter that defines success: Yield. This presentation will focus on techniques and strategies to optimize design for yield (DFY) when selecting, designing and implementing physical IP.

About Patrick Soheil

Patrick Soheili is responsible for eSilicon's business development activities as well as eSilicon IP Solutions. He has over 25 years of demonstrated success at several leading technology companies. Patrick has been president and CEO of On Demand Microelectronics, Cradle Technologies and Softcoin. He was a founding partner of Barrington Partners, a technology-focused venture capital firm, from 1998 to 2002. He was vice president of sales and marketing for Invox Technology and a senior executive with Altera Corporation. Prior to Altera, he spent several years in various marketing management positions with AMD and TRW.

About eSilicon

eSilicon, the largest independent semiconductor design and manufacturing services provider, delivers custom ICs and custom IP to OEMs, independent device manufacturers (IDMs), fabless semiconductor companies (FSCs) and wafer foundries through a fast, flexible, lower-risk path to volume production. eSilicon serves a wide variety of markets including the communications, computer, consumer, industrial products and medical segments.


Sally Slemons
eSilicon Corporation
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Susan Cain
Cain Communications
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