Jennic to Demonstrate Serial RapidIO IP in silicon

Jennic Has Announced Its Use of NEC Electronics' ISSP Structured ASIC Technology to Develop a Test Chip for Use in RapidIO Interoperability Tests

SHEFFIELD, United Kingdom, Sept. 20 /PRNewswire/ -- Jennic, the system-level Intellectual Property (IP) provider, today announced the test and evaluation of its Serial RapidIO IP core by NEC Electronics. The aim is to provide OEM customers with silicon proven IP that will reduce their development time and the associated risks.

Jennic will incorporate NEC Electronics' SerDes and a range of test and diagnostic capabilities into their Serial RapidIO IP core, which will then be implemented in a test chip using NEC Electronics' ISSP Structured ASIC technology. The test chip will then be used to undertake compliance and interoperability testing with products from other members of the RapidIO Trade Association.

"The availability of silicon proven IP is a vital element of the RapidIO ecosystem. The combination of Jennic's system level IP and NEC Electronics' leading edge ASIC technology provides a compelling solution for OEM customers implementing RapidIO systems," said Iain Scott, Executive Director of the RapidIO Trade Association.

Jennic is an active participant in the RapidIO Trade Association and during the development of this IP has made extensive use of other RapidIO Trade Association sponsored initiatives to ensure standards compliance and compatibility with other vendors solutions: These have included the use of the compliance checklists and functional simulation against the bus functional models that allow behavioural modeling in a system level environment.

Jennic's RapidIO IP product line provides a range of complete, fully integrated RapidIO interface solutions to address a wide range of applications including endpoints and switches. They are based around a common, modular architecture and implement the Physical, Transport and Logical Layer RapidIO standards.

About Jennic

Jennic is a leading provider of Intellectual Property and silicon design services to the broadband communications market. Jennic combines its system expertise, advanced Intellectual Property portfolio and skills in digital, software, mixed-signal and SoC design to deliver performance, cost and time-to-market advantages to its system OEMs and semiconductor customers. Jennic's Intellectual Property portfolio includes physical layer framers and bus bridges for wide and metro area networks, access network co-processors, line-card connectivity solutions and cellular, low power wireless and data mixed-signal systems.

CONTACT: Carol Daniels of Jennic, Email Contact

CONTACT: Carol Daniels of Jennic, Email Contact

Web site:

Review Article Be the first to review this article
Featured Video
Geospatial Analyst/Programmer for LANDIQ at Sacramento, California
GIS - Systems Analyst for City of Olathe at Olathe, Kansas
SENIOR GIS GAS SPECIALIST for James W. Sewall Company at , Any State in the USA
Mechanical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Senior Structural Engineer for Wiss,Janney, Estner Assoicates, Inc at houston, Texas
System Designer/Engineer for Bluewater at Southfield, Michigan
Upcoming Events
FME World Tour 2018 at Munich Germany - Apr 17, 2018
FME World Tour 2018 at Berlin Germany - Apr 18, 2018
GEOINT 2018 Symposium at 333 S Franklin St Tampa FL - Apr 22 - 25, 2018
FME World Tour 2018 at Frankfurt Germany - Apr 24, 2018
Canon: oce crystalPoint
Teledyne Optech
University of Denver GIS Masters Degree Online - Countless CAD add-ons, plug-ins and more.

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise