Axilica Limited demonstrates “FalconML” at DATE conference on 10th – 14th March 2008, Munich Germany.
FalconML is a powerful new tool developed by Axilica to deliver behavioural synthesis of FPGA or ASIC-directed hardware designs from UML. FalconML radically improves designer productivity, allowing electronic chip design companies to:
What is FalconML?
Construct complex systems with considerably reduced development times
Minimise product development costs
Reach markets ahead of competitors
Rapidly add key differentiating features.
FalconML is a front-end EDA tool that initiates the design process at the UML specification level. It enables true software/hardware partitioning and delivers an output compatible with all EDA back-end flows. The advanced behavioural synthesis engine in FalconML provides routes from UML to both SystemC (for high-performance functional simulation) and to RTL (targeting both FPGAs and ASICs). Silicon IP generated by FalconML can integrate with legacy IP through direct control of design interfaces, allowing such IP to be utilised in new high-performance large-scale VLSI solutions, while taking advantage of the accelerated design process offered by FalconML.
Why use FalconML?
Axilica Limited provides products and services to support the rapid development of electronic systems. FalconML is now available for evaluation. For additional information please contact.
FalconML automates the flow from specification capture to chip while shortening time to market
FalconML gives a common starting point for hardware and software design, simplifying co-design and partitioning decisions
FalconML integrates easily with existing tools and processes
For software design companies, FaconML gives low cost of entry into hardware design, while end-products operate faster, consume less power and can be miniaturized
Re-work costs are substantially reduced by performing verification at a higher level of abstraction
About Axilica Ltd
Axilica has developed a powerful new tool that enables the use of Unified Modeling Language (UML) for the design of electronic hardware. Axilica technology uses model-based techniques to greatly increase designer productivity when implementing today's highly complex electronic systems. Axilica Limited is a spin-out from Loughborough University’s Electrical & Electronic Engineering Department with funding from IPSO Ventures and The Lachesis Fund Loughborough University Enterprises Limited is also a shareholder.
Axilica Limited is a company registered in England and Wales with company number 6304993. Registered office: 62 - 65 Chandos Place, Covent Garden, London WC2N 4LP, United Kingdom.
Vice President, Business development
Loughborough Innovation Centre
Epinal Way, Loughborough, LE11 3EH, UK
E-mail: Email Contact
Tel: +44 (0)1509-227131
Dir: +44 (0)1509-225834