Digital Blocks Announces the TFT LCD Controller Reference Design for Altera FPGA Development Kits based on the DB9000AVLN LCD Controller IP Core

Specifically targeted for TFT LCD panels and Altera FPGAs, the reference design is an out-of-the-box solution for display system designers.

GLEN ROCK, New Jersey, – November 07, 2008 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for embedded processor and video system designers, today announces the TFT LCD Controller Reference Design centered on Digital Blocks DB9000AVLN TFT LCD Controller IP Core and Altera’s FPGA Development Kits.

“The TFT LCD Controller Reference Design builds on Digital Blocks DB9000AVLN TFT LCD Controller Verilog IP Core, as well as on Altera FPGA development kits, with their embedded NIOS II microprocessor and SDRAM and SRAM memories for program and frame buffer storage,” said Steven Stein, President of Digital Blocks. “With the reference design -- which includes software -- system designers can quickly bring-up a FPGA-based solution to their TFT LCD display requirements.”

About the Reference Design

The TFT LCD Controller Reference Design is available immediately for download. More information regarding the reference design can be obtained on both the Altera and Digital Blocks web site.

About the DB9000AVLN LCD Controller IP Core

The DB9000AVLN IP Core targets Altera FPGAs with the NIOS II embedded processors and systems requiring a TFT LCD panel. The DB9000AVLN IP Core specifically and cost-effectively targets TFT LCD panels with 1 or 2 Ports of 18-bit digital (6-bits/color) or 24-bit digital (8-bits/color) interface.

The DB9000AVLN IP Core contains programmable features comparable to entry-level ASSP LCD controller chips, including a color palette to reduce frame buffer space and Avalon bus bandwidth. With the cores wide range of programming parameters, the controller can support a wide range of LCD panel resolutions. Representative examples are as follows:

Format Resolution
Square 240x240
QVGA 320x240
  240x320
16:9 Aspect Ratio 480x272
VGA 640x480
SVGA 800x600
XGA 1024x768
SXGA 1280x1024
UXGA 1600x1200
WUXGA 1920x1200



About Digital Blocks

Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. 
 

Contact:

Digital Blocks
587 Rock Rd
Glen Rock, NJ 07452 (USA).
Tel.: +1-201-251-1281
Fax: +1-201-632-4809
E-mail:   Email Contact;
www.digitalblocks.com




Review Article Be the first to review this article

Harris

Jobs
GIS Analyst for G2 Partners LLC at San Ramon, CA
GIS Software Developer for UDC at Englewood, CO
Structural Engineer for Albert Kahn and Associates at Detroit, MI
Senior Mechanical Engineer for Albert Kahn and Associates at Detroit, MI
Vice President, Transportation Services for Associated General Contractors of New York State at Albany, NY
Upcoming Events
Commercial UAV EXPO Americas at The Westgate Resort Las Vegas NV - Oct 24 - 26, 2017
6th International Colloquium on Scientific and Fundamental Aspects of GNSS / Galileo at Technical University of Valencia Valencia Spain - Oct 25 - 27, 2017
UnmannedCanada 2017 at Sheraton Parkway Toronto North Toronto Ontario Canada - Nov 1 - 3, 2017
Scientific Days of Geographical Applications, Geometric Sciences and Digital Technologies at HOTEL NIPPON TAKSIM ISTANBUL ISTANBUL Turkey - Nov 7 - 10, 2017
Teledyne Optech
Teledyne:
CADalog.com - Countless CAD add-ons, plug-ins and more.



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation TechJobsCafe - Technical Jobs and Resumes  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise