Bryant the Beer Guy & Your Plans for DAC

* Synopsys also announced that TriQuint Semiconductor is using TCAD Sentaurus device simulation software for R&D on “high-frequency and high-power semiconductor devices targeting mobile handsets, 3G and 4G base stations, Wi-Fi, WiMAX, and defense and aerospace applications.”

* Tensilica announced that SiliconXpress is now an “authorized design center.” Tensilica’s Chris Jones is quoted in the Press Release: "SiliconXpress offers deep understanding of the entire chip design process, so companies can use them as a valuable resource for parts, or all, of their chip designs.”

* Tensilica also announced that TranSwitch Corp. has “integrated two Xtensa customizable Dataplane Processor Units (DPUs) into its recently introduced Atlanta 2000 gigabit-rate communications processor product family.”

* X-FAB Silicon Foundries announced what the company is calling “the industry’s first foundry process for the production of integrated Hall sensor ICs in 0.18-micrometer technology. Its 0.18 micrometer low-power CMOS process, known as XH018, allows the combination of Hall sensor elements with high-voltage devices and Non-Volatile Memory (NVM) options … [enabling] the sensing element to be integrated on the same chip as its control logic and interface circuitry. Due to its small geometry resulting in high integration density, high magnetic sensitivity can be achieved with minimal parasitic effects.”


There will be a quiz ….

* TSMC announced its iRCX, interoperable EDA data format for TSMC’s 65-nanometer and 40-nanometer technologies:

Per the Press Release: “TSMC collaborated extensively with EDA ecosystem partners in the iRCX initiative, defined the unified format based on TSMC process requirements, worked with EDA partners to implement the new format support in the tools, and closed the loop by qualifying tool accuracy against actual silicon measurements, eliminating data inconsistency, reducing customer tool evaluation time and improving design accuracy … Multiple EDA companies are participating in the qualification program.”

More info: “The iRCX format unifies interconnect modeling data delivery, and ensures data integrity and interpretation. EDA tools which support iRCX format will be able to receive accurate interconnect modeling data from the iRCX files developed and supported by TSMC. Interconnect-related EDA applications, including P&R, RC extraction, EM analysis, power integrity analysis, and EM simulation [will] benefit from iRCX … the first of several interoperable EDA interface formats co-developed between TSMC and its design tool partners as part of the TSMC Open Innovation Platform (OIP).”

Per Shauh-Teh Juang, Senior Director for Design Infrastructure Marketing at TSMC: "iRCX is part of the TSMC Open Innovation Platform [OIP] that includes the Active Accuracy Assurance [AAA] Initiative. This new unified EDA data format provides designers the ability to select qualified EDA tools to match their design needs, improve compliance with TSMC processes, and ensure design accuracy for first time silicon success."

And did you know: “The TSMC Open Innovation Platform promotes timeliness-driven innovation amongst the semiconductor design community, its ecosystem partners and TSMC's IP, design implementation and DFM capabilities, process technology and backend services. The Open Innovation Platform includes a set of ecosystem interfaces and collaborative components initiated and supported by TSMC that efficiently empowers innovation throughout the supply chain and enables the creation and sharing of newly created revenue and profitability.”

Also, you should know: “TSMC's AAA initiative is a broad-based program that encompasses all design ecosystem components. It provides accurate standards for all TSMC partners, EDA vendors, IP providers, library developers, and Design Center Alliance (DCA) members. The standards apply to tools, building blocks, and technologies, including TSMC Reference Flow 9.0, DFM tools, PDKs, design support and backend services.”

* Pop Quiz:

Distinguish between TSMC’s OIP, DAC, AAA, Integrated Sign-Off Flow programs. Your answer should no longer than 500 words in length and must be postmarked by Midnight, 20 June 2009. All responses become the Property of and will not be returned to the respondents.


Why you should attend the TSMC Keynote at DAC …

* Apache Design Solutions announced that the Company’s RedHawk has been certified to support TSMC’s iRCX 65-nanometerm and 40-nanometer technologies. In addition, RedHawk is included in the TSMC Integrated Sign-off Flow.

* Azuro announced its PowerCentric low power clock tree synthesis tool has been included in TSMC's Integrated Sign-Off Flow.

* Cadence Design Systems announced the Cadence QRC extraction signoff technology has adopted the TSMC iRCX data format.

* IMEC announced a new and expanded research agreement with TSMC, whereby TSMC will base its extended European research efforts at the IMEC premises. Per the Press Release: “In this way, TSMC can benefit from IMEC’s state-of-the-art clean room infrastructure which is currently been expanded to house the most advanced – often pre-production – semiconductor manufacturing tools, allowing to research technologies ahead of industrial needs. IMEC and its members can benefit from TSMC’s broad-based technology roadmap and platform expertise, customers, suppliers, and ecosystem partners.”

* Legend Design Technology announced its Model Diagnoser has been selected by TSMC for use in the quality assurance of the company’s standard cell libraries.

* Magma announced that its QuickCap NX has been certified to support the parasitic extraction and modeling accuracy requirements of the TSMC iRCX format for 65-nanometer and 40-nanometer ICs.

* Synopsys announced that TSMC selected Synopsys' Galaxy Implementation Platform for their new Integrated Sign-Off Flow. The new flow is now available for 65-nanometer designs with planned extensions into other process technology nodes.


Looking forward to seeing all of you at DAC in San Francisco in July!

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