Real Intent to Exhibit at Design Solution Forum 2014 in Japan
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Real Intent to Exhibit at Design Solution Forum 2014 in Japan

SUNNYVALE, Calif. and YOKOHAMA, Japan – Sept. 26, 2014 –

Who

Real Intent, whose advanced verification solutions accelerate electronic design sign-off, eliminate complex failures in SoCs, and lead the market in performance, capacity, accuracy and completeness

What

Will exhibit its Ascent™ and Meridian™ products for accelerating RTL sign-off, at the Design Solution Forum 2014 in Yokohama, Japan next week. Sponsored by the Japan Electronics Show Association, this seminar brings together engineers throughout Japan to share the latest information about design, verification, software and FPGA technology trends.  Yasuo Torisawa, Country Manager at Real Intent KK, will help attendees learn more about Real Intent’s Ascent tools – the fastest and highest-capacity verification solutions available for uncovering issues prior to digital simulation – and its Meridian products that accelerate sign-off verification of clock domain crossings and timing constraints in giga-gate SoC designs. These products include:

When/Where

Friday, Oct. 3, 2014 (10:00 – 18:00)
Shin-Yokohama Kokusai Hotel

Seminar: Third and fourth floor conference room

Table exhibits: Second floor, Queens Hall

Kohoku-ku, Yokohama, 222-0033 Japan 
+81 45-473-1311

About Real Intent

Companies worldwide rely on Real Intent’s EDA software to accelerate early functional verification and advanced sign-off of electronic designs. Real Intent’s comprehensive CDC verification, advanced RTL analysis and sign-off solutions eliminate complex failure modes of SoCs, and lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.

Real Intent and the Real Intent logo are registered trademarks, and Meridian and Ascent are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.

Acronyms

CDC:      Clock Domain Crossing
EDA:      Electronic Design Automation
FPGA:    Field Programmable Gate Array
RTL:       Register Transfer Level
SoCs:     Systems-on-Chip

Press contact

Sarah Miller for Real Intent
ThinkBold Corporate Communications
231.264.8636
Email Contact