Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 10nm FinFET Early Design Starts
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Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 10nm FinFET Early Design Starts

SAN JOSE, Calif., April 6, 2015 — (PRNewswire) — Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its digital and custom/analog tools have achieved certification from TSMC (TWSE: 2330, NYSE: TSM) for its most current version of 10-nanometer (nm) FinFET Design Rule Manual (DRM) and SPICE models.

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The Cadence® custom/analog and digital implementation and signoff tools have been certified by TSMC on high-performance reference designs in order to provide customers with the fastest path to design closure on the 10nm FinFET process and include:

Furthermore, TSMC's 10nm libraries are created using the Cadence Virtuoso Liberate™ Characterization Solution and Spectre Circuit Simulator.

"We collaborated very closely with Cadence on the certification process so our mutual customers can enjoy the performance and power improvements available with advanced FinFET process technologies," said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. "The certification of Cadence custom/analog and digital implementation and signoff tools ensures design solution readiness for customers to achieve reduced iterations and improved predictability with 10nm FinFET designs."

"Customers can begin leveraging 10nm FinFET solutions to overcome design complexity and get to market faster, and we are already seeing success with early customer design starts," said Dr. Chi-Ping Hsu, senior vice president and chief strategy officer for EDA at Cadence. "TSMC and Cadence have had a long history of collaboration that has led to continued advancements in silicon technology, and we plan to work together with our customers to drive innovations based on the latest process technologies."

For more information on the Cadence tools that have achieved TSMC certification for the 10nm FinFET process, please visit

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at

This news release contains certain forward-looking statements, including expectations for product release dates and performance that are based on our current expectations and involve numerous risks and uncertainties that may cause these forward-looking statements to be inaccurate. Risks that may cause these forward-looking statements to be inaccurate include among others: our products may not be available in the capacities or on the schedule that we expect or perform as expected, or the other risks detailed from time-to-time in our Securities and Exchange Commission filings and reports, including, but not limited to, our most recent quarterly report on Form 10-Q and our annual report on Form 10-K. We do not intend to update the information contained in this press release.

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Encounter, Spectre and Virtuoso are registered trademarks and Innovus, Liberate, Quantus, Tempus and Voltus are trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

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SOURCE Cadence Design Systems, Inc.

Cadence Design Systems, Inc.