”We’re happy that the DesignCon organization has recognized the Olympus-SoC system as an innovative step forward in place-and-route,” said Pravin Madhani, general manager of Mentor’s place-and-route group. “At 45nm and beyond, tough challenges in physical design of SoCs require a new approach to place-and-route architecture. We anticipated these when we designed the Olympus-SoC product and feel we definitely have a unique solution that addresses our customers’ biggest P&R issues.”
Last October, Mentor announced the Olympus-SoC Parallel Timing Analysis and Optimization technology, making Olympus-SoC the only place-and-route system providing true concurrent multi-corner multi-mode optimization with a fully parallelized core timing engine. This enables the Olympus product to scale effectively on multicore and multiprocessor computing platforms. Parallel Timing Analysis and Optimization enables Olympus-SoC to maintain fast turnaround times for rapid closure of new IC designs with upwards of 100 million gates and a large number of modes and corners.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million and employs approximately 4,450 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
(Mentor Graphics is a registered trademark and Olympus-SoC is a trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners).
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